Seminar on System in Package

Seminar on System in Package

Project / Seminar Material
Reference ID: PS-24329-TM

DEDICATION

This research material titled “Seminar on System in Package” is dedicated to God for his enabling grace, and to all computer enthusiasts who contributed to make life a pleasant experience during my research documentation.

ACKNOWLEDGEMENT

I extend my sincere gratitude to all those who contributed to the completion of this project. Special thanks to my Supervisor (Name of your Supervisor), the Head of Department (Name of your HOD), the Lecturers in the department of Computer Science (CS), Book Authors and Profound Scholars of existing or related project material on “Seminar on System in Package” for their invaluable guidance, support, and expertise throughout the journey.

I am also grateful to your study area (mention any funding organizations, if applicable) for their financial assistance. This research would not have been possible without the encouragement and assistance of some stakeholders (mention any mentors, teachers, or colleagues). Additionally, I would like to acknowledge the understanding and patience of my family and friends during this endeavor. Your unwavering support has been a constant source of motivation. Thank you all for being part of this meaningful endeavor.

Seminar on System in Package

CHAPTER ONE

1.1 Introduction

Today, with the growing scalability of semiconductor processes, the higher level of functional integration at the die level, and the system integration of different technologies needed for consumer electronics, System-in-package (SiP) is the new advanced system integration technology, which integrates (or vertically stacks) within a single package multiple components such as CPU, digital logic, analog/mixed signal, memory, and passive and discrete components in a single system. SiP reduces the form factor of a system. Compared with system on-a-chip (SoC), SiP decreases the cost due to the following reasons. First, different components may be fabricated in different generations or different types of technologies, without complications and high cost associated with integrating heterogeneous technologies in one process. The same component can be fabricated in a large volume and used for different systems, amortizing the ever-increasing non-recurring engineering expenses such as those for designing and mask. Smaller size improves yield rate and reduces production cost. It also makes design easier and reduces time-to-market. While SiP clearly has advantages, the design complexities and costs associated with designing the package and integrating the different components in a system may eclipse the design challenges of the stand- alone dies. Packaging has evolved over the years from the point where chips had few pins to designs that have thousands of pins.

As a prelude to other parts of this study, this chapter will discuss the background upon which this study was initiated, the statement of problems that led to this study, the Aim and Objectives of the study. Others are Significance of the study, Scope of work, Limitations of the Study and Definition of technical terms.

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CHAPTER TWO

2.0 Literature Review

2.1 Introduction

This chapter focuses on the review of related literature. A literature review includes the current knowledge as well as theoretical and methodological contributions to a particular topic. It documents the state of the art with respect to the topic you are writing. It surveys the literature in the topic selected. In this research work the literature review includes the …

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