1.1 Introduction
Today, with the growing scalability of semiconductor processes, the higher level of functional integration at the die level, and the system integration of different technologies needed for consumer electronics, System-in-package (SiP) is the new advanced system integration technology, which integrates (or vertically stacks) within a single package multiple components such as CPU, digital logic, analog/mixed signal, memory, and passive and discrete components in a single system. SiP reduces the form factor of a system. Compared with system on-a-chip (SoC), SiP decreases the cost due to the following reasons. First, different components may be fabricated in different generations or different types of technologies, without complications and high cost associated with integrating heterogeneous technologies in one process. The same component can be fabricated in a large volume and used for different systems, amortizing the ever-increasing non-recurring engineering expenses such as those for designing and mask. Smaller size improves yield rate and reduces production cost. It also makes design easier and reduces time-to-market. While SiP clearly has advantages, the design complexities and costs associated with designing the package and integrating the different components in a system may eclipse the design challenges of the stand- alone dies. Packaging has evolved over the years from the point where chips had few pins to designs that have thousands of pins.
As a prelude to other parts of this study, this chapter will discuss the background upon which this study was initiated, the statement of problems that led to this study, the Aim and Objectives of the study. Others are Significance of the study, Scope of work, Limitations of the Study and Definition of technical terms.
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